搜索资源列表
ispLEVER培训教程
- ispLEVER是LATTICE的CPLD、FPGA继承开发环境-ispLEVER CPLD, FPGA development environment succession
用VHDL语言在CPLD_FPGA上实现浮点运算
- 用VHDL语言在CPLD/FPGA上实现浮点运算的方法-in VHDL CPLD / FPGA achieve floating-point computation methods
fpga 和 cpld入门教程
- 本教程定位于FPGA/CPLD的快速入门。以ALTERA公司的芯片和相应的开发软件为目标载体进行阐述，本教程阐述了ALTERA主要系列芯片PLD芯片的结构和特点以及相应的开发软件MAX和Plusa和Quartus的使用-position in the handbook FPGA / CPLD Quick Start. With Altera's chips and the corresponding development of software for the target vecto
cpld_fpga_SW
- 里面介绍了＂CPLD，FPGA软件编程＂，里面许多许多例子，还有原代码，我也是辛苦才收集到的资料，希望能给其他工程师派上用场．-they introduced the "CPLD, FPGA software program" Inside many, many examples, the original code, I also hard to collect the information in hopes of giving the other engineers u
testben
- 这是由xilin公司提供的测试文档，对于用XILINX公司的CPLD/FPGA的用户来说挺不错的。-xilin provided by the test documents, XILINX used for the CPLD / FPGA users quite well.
CPLDFPGAprotellibrary
- CPLD FPGA常用protel库.rar-CPLD FPGA used the Protel. Rar
FPGACPLD
- 学习FPGA CPLD的入门文档，比较适合初学者-learning portal CPLD FPGA files, suitable for beginners
cpld_fpga_source_code
- cpld fpga 一些应用实例程序的源代码. -cpld fpga application procedures for some of the source code.
PLDcPLDFPGA
- PLD、CPLD、FPGA有何不同？（问与答）-PLD, CPLD, FPGA any different? (Answer)
FPGA_design
- Altera+FPGA／CPLD设计基础篇和高级篇.pdf，详细讲解FPGA的设计过程及应用-Altera+ FPGA/CPLD Design Basics and advanced articles. Pdf, explain in detail the design process and application of FPGA
miniuart2
- 用ＶＨＤＬ在CPLD/FPGA上实现与PC机的RS232通信-This UART (Universal Asynchronous Receiver Transmitter) is designed to make an interface between a RS232 line and a wishbone bus, or a microcontroller, or an IP core. It works fine connected to the serial port of a
RS232_FIR
- Quartus II was a development tool of CPLD / FPGA by Altera Company. Quartus II provides a fully integrated circuit structure and has nothing with the development package environment, it has all the features of digital logic design, it is including: a
VHDL-CPLD
- 程序-自动售货机 基于CPLD、FPGA的程序-Program- the vending machine based on CPLD, FPGA program
FPGA-CPLDrumen
- FPGA 和 CPLD入门教程 FPGA 和 CPLD入门教程-FPGA and CPLD FPGA and CPLD Tutorial Tutorial Tutorial FPGA and CPLD
CPLD-Three-voting
- CPLD/FPGA 设计实例手册 用VHDL语言设计三人表决器 用原理图输入的方式设计三人表决器 用verilog-HDL语言设计三人表决器-CPLD/FPGA design example manual Three of the voting machine VHDL language Schematic design of a three-member voting Verilog-HDL language design three-member voti
easy-CPLD
- 学习CPLD/FPGA很好的电子书．讲得很好．-Learning CPLD/FPGA good books. Put it very well.
fpga-study
- 学习CPLD/FPGA很好的电子书．讲得很好．-Learning CPLD/FPGA good books. Put it very well.
plj.FPGA
- 本频率计基于CPLD/FPGA实现。 50MHZ标准频率为CPLD内部时钟信号，被测方波为信号发生器产生的方波信号，显示电路由TTL芯片及七段数码管组成的电路，自校正输出由CPLD输出已知频率的测试方波信号，可将其输入至测试端口，进行系统精度校正。 -The frequency meter based on CPLD/FPGA implementation. 50MHZ standard CPLD internal clock signal frequency, square-wave test
CPLD
- 数字频率计在FPGAEP4CE10F17C8上的功能实现和运用(Application of digital cymometer in FPGA)
用CPLD和Flash实现FPGA配置
- 通过CPLD和外部Flash芯片对FPGA进行配置。(By CPLD and external Flash chip of FPGA configuration.)